1. Field of the Invention
The present invention relates to a metal electrode which serves as a connecting terminal, or pin, of a semiconductor device or other electronic components and a method of joining the metal electrode to a circuit card. More particularly, the invention pertains to a metal electrode for bonding multiple semiconductor devices, multiple electronic components, or a semiconductor device and an electronic component, as well as to a method of joining a metal electrode to a circuit card.
2. Description of the Background Art
With a growing demand for increased data transmission rate today, there is a pressing need for developing microjoining technology to cope with an ever continuing move toward a further reduction in the size of electronic components and a finer pitch arrangement of their connecting pins.
Also, due to today's prevailing tendency toward low-cost products, temperature limits of heat resistance of electronic components continues to lower these days. Thus, there is a strong need today to decrease bonding temperature at which metal electrodes of electronic components are joined to a circuit card to prevent damages to the electronic components. Furthermore, it is highly needed to lower the bonding temperature to diminish warp and twist of joined elements.
Another ongoing trend in semiconductor technology is an increase in the number of connecting pins and a consequent finer pitch pin arrangement to implement as many functions and as high performance as possible in a single semiconductor device without increasing the chip size. In this situation, greater quantities of solder than actually needed have so far been supplied to joints in order to absorb variations in the height of individual electrodes and to facilitate intrusion of resin which is later supplied for strengthening the joints, for instance.
Under these circumstances, prior art (e.g., Japanese Examined Patent Publication No. 3024097) discloses a method of joining metal electrodes. According to the Publication, a metal electrode has a structure in which a high melting point solder ball is attached to a wiring, and a layer of low melting point metal which produces an eutectic reaction with the high melting point solder is formed on the surface of the solder ball. In this method of metal electrode joining, the solder ball is heated to a temperature equal to or higher than the eutectic point of the low melting point metal and high melting point solder but lower than the melting point of the high melting point solder without melting a portion of the solder ball close to but not in contact with the wiring to thereby join the metal electrode to the wiring at a relatively low temperature with a reduced amount of molten metal.
Another prior art document (Proceedings of the 1998 Electronic and Technology Conference, USA, pp. 284–291) discloses an electrode structure, in which the surface of a metal electrode is coated with the same metallic element as a circuit card to which the metal electrode is joined. This electrode structure is so designed that the metal electrode can be joined to the circuit card at as low a melting point as possible forming a layer of a compound of the coated metallic element and material of the metal electrode having a high remelting temperature between the metal electrode and the circuit card. This non-patent prior art document discloses an exemplary electrode structure, in which copper (Cu) forming a circuit card is evaporated onto a tin (Sn) layer covering the surface of an electrode so that a layer of Cu6Sn5 is formed as a result of bonding.
A conventionally known approach to mount a semiconductor device on a circuit card is flip-chip bonding. According to this approach, a resin containing a reducing material is preapplied around electrodes and, after bringing electrode surfaces of the semiconductor device and the wiring board into mutual contact by simultaneously applying heat and pressure thereby purging the resin of a gel form from the contact surfaces, the semiconductor device is joined to the wiring board by almost simultaneous melt bonding and resin hardening while removing a oxide film formed on a solder surface with the aid of the reducing material. In this bonding method, it is essential that the resin of the gel form be removed from around the electrodes of the semiconductor device and the circuit card to allow their direct contact before the electrode surfaces are melted.
According to the method described in the aforementioned Japanese Examined Patent Publication No. 3024097, however, the low melting point metal exists on the surface of the solder ball, so that viscosity of the molten low melting point metal of the solder ball is lower than the resin. This poses a problem that the molten low melting point metal of the solder ball can not thoroughly remove the resin from the contact surfaces but rather mixes with the resin during bonding process, resulting in a high risk of bonding defects and deterioration of joint reliability.
The deterioration of joint reliability will become progressively more conspicuous with the lapse of time that joints are exposed to room temperature after their formation. Thus, the aforementioned conventional approach lacks in long-term service life (reliability) of the joint.
According to the aforementioned non-patent prior art document, the melting point of the outermost Cu6Sn5 layer of the electrode is estimated at 415° C. which is higher than the melting point of the underlying Sn layer. However, the eutectic temperature of Cu6Sn5 and Sn is 227° C., so that the joining temperature exceeds the melting temperatures of currently available solders (e.g., 183° C. for Sn-37Pb solder and 221° C. for Sn-3.5Ag solder).
The aforementioned intermetallic compound Cu6Sn5 has a hardness of 76 on the Knoop scale (Bulletin of the Japan Electronic Materials Society, 1984, Vol. 16, p. 30). Since Cu6Sn5 is considerably harder than Sn of which hardness is 7, a large load is needed to bring the entire surface of electrodes of a semiconductor device into contact with corresponding electrodes of a wiring board, particularly in the case of a semiconductor device having a large number of pins.
Furthermore, since Cu6Sn5 is chemically so stable that it takes a long time to remove an oxide film, causing an increased risk of greater warpage, component damages by heat and deterioration of joint reliability.